The present invention relates to a method of controlling the number of jobs which are executed in parallel in a digital computer.
In order to increase in the processing capacity of a single processor system, which is constructed of a single processor (i.e., central processing unit), or to improve the reliability of the single processor system a multi processor system, having a plurality of processors may be used. Multi processor systems are divided into several kinds in accordance with the manner in which the respective component processors are coupled to each other. One is a system, in which the respective processors share a DASD (i.e., Direct Access Storage Device) (e.g., a disc device) thereamong and are coupled to each other in a distributed type manner by the use of a CTCA (i.e., Channel To Channel Adaptor). This system is called an LCMP (i.e., Loosely Coupled Multi Processor) system, and is different from a TCMP (i.e., Tightly Coupled Multi Processor) system, in which the respective processors share a main memory unit there and are operated under the control of a single OS (i.e., Operating System).
FIG. 1 shows an example of the construction of the LCMP system which is costructed of three processors. In this example, a single global processor 1 performs the input of jobs from an input device such as a card reader 3 and the output of the job execution result to an output device such as a line printer 4 and the distribution of the job to itself and the local processors 2. The global processor 1 and the respective local processors 2 share a drum unit 5, i.e., one file on the DASD through a channel switch (not shown) so as to transfer a variety of data relating to the job and are connected through a CTCA6 so as to transfer control data such as the output demand of the job or the information of the termination of the job execution. The input and output of the job are performed in the global processor 1, but TSS (i.e., Time Sharing System) terminals 7 can be connected with the local processors 2, too, so that the TSS job is executed in the processor 1 or 2 which is connected with the TSS terminals 7.
Here, the definition of the "job" is given. Namely, the unit of calculation demanded from a user is called the job. Each job contains several programs which are to be consecutively executed and which are exemplified by those edited from a program written in high-level language, those complied, or those complied to be executed. Those respective programs are divided and executed in such units as are managed and controlled by the operating system. These units are called job step tasks. Nevertheless, in the LCMP system, a job has to be executed by an identical processor from the beginning to the end. Therefore, in one job, for example, it is impossible to execute one job step task by the global processor 1 and the other job step task by the local processors 2. By making use of the fact that a procesor and an I/O device can be processed in parallel, on the otherhand, the operating system can simultaneously feed a plurality of jobs thereto and process them in parallel. This number of the jobs being processed in parallel is called the multiplicity of the jobs. The prior art thus far described should be referred to "The Logical Design of Operating Systems, Prentice-Hall ('74)" by Alan C. Shaw.
FIG. 2 shows the general construction of the job processing in the LCMP system. The user feeds his own job by reading it out of the card reader 3 or the like, which is connected with the global processor 1, by the use of an input reader program 24. The job thus fed constitutes an execution-waiting-JOB queue 25. During this execution waiting time, the job is stored in the drum unit 5 (as shown in FIG. 1). A job scheduler program 26 schedules the execution of the job so that it usually extracts the job in the fed order from the execution-waiting-JOB queue 25, if it is requested for the job extraction by an initiator program 27 administering the job execution of the respective processors (i.e., the global processor 1 and the local processors 2), and transfers it to the initiator program 27. After the job execution has been performed under the control of the initiator program 27, the job scheduler program 26 is informed of the termination of the job execution. At this instant, the result of the job execution is stored in the drum unit volume 5, and the job after the execution constitutes an output-waiting-JOB queue 28. Moreover, the results of the job execution are fed one by one out of the drum unit 5 to a line printer 30 or the like by the action of an output writer program 29.
In order to construct the multi processor system and to extract sufficient performance therefrom, generally speaking, the workload to be exerted upon the system has to be balancably distributed among the respective processors so that the respective processors may utilize their maximum capacity. Nevertheless, in the conventional system, as has been described above, upon request of the job extraction from the initiator program 27 of each processor, the job is scheduled in accordance with the number of the predesignated initiator tasks 27 independently of the actual workload of the TSS job of the processor under consideration. In order to cope with the fluctuations (e.g., the abrupt changes in the active TSS terminals) in the workloads upon the respective processors, therefore, the operator has to change the number of the initiator programs each time to make proper the workloads upon the processors. If the number of the initiator programs is improper, however, the operator is not informed before the instant when the processing capacities of the processors are substantially lessened so that the operator fails to timely control the proper number of the initiator programs. Therefore, it is difficult to control the processing capacity of the processors to their maximum.
In order to solve this, there can be conceived a method by which the time period of the central processing unit in the processor being not idle is dynamically controlled in view of the utilization of only the processor. The defect concomitant with this method will be described in the following. Specifically, if the utilization of the processor is high, it can be generally said that the processing capacity is high. On the contrary, notwithstanding, that the utilization is low, it cannot be concluded that the processing capacity is low. The utilization of the I/O device has to be taken into consideration. A representative of the I/O device is the drum unit 5 of FIG. 1. In the actual computer system, however, an I/O device such as a plurality of disc devices (although not shown) are independently connected with the respective processors. Generally speaking, this is partly because the processors and the I/O devices, and the I/O devices can operate in parallel and partly because, even if the utilization of the processors is low, the cause therefore is divided into the following two items:
(1) Most of the jobs simultaneously use different I/O devices, and few jobs use the processors; and
(2) Although many jobs use an identical I/O device, the processings at the processors do not advance, unless that I/O device is used, advance which cannot occur until the other jobs have finished using that I/O device.
The aforementioned items (1) and (2) have absolutely different progress rates of processing. More specifically, the item (1) smoothly progresses in single processing by the job so that its processing time is shorter than that of the item (2). Therefore, when the magnitude of the workload is judged exclusively in view of the utilization of the processors, it is conceivable that a large error takes place.
As has been described hereinbefore, in case the multiplicity of jobs is to be controlled so that the workloads upon the processor is of the proper magnitude, it is understandable that the magnitudes of those workloads are not dependent only upon the utilization of the processors (i.e., the used time of the processors). Consequently, the control of the multiplicity of the job being executed only on the basis of the utilization of the processors would not maximize the processing capacities of the processors.
This applies not only to the multi processor system but also the system composed of a single processor.